Circuit designer

Responsibilities

• End-to-End Embedded/DSP system design.

• Complex logic implementation using RTL coding techniques (preferably VHDL and HLS)

• Able to implement various complex algorithms and curve fitting/Neural network based algorithms inside the FPGA hardware.

• Writing modular RTL codes and design techniques using IPs.

• Simulating the design at various stages of development.

• CDC, STA, area/power optimizations, floor planning, linting.

• Interfacing high speed ADCs/DACs using state of the art data transfer links to FPGA.

• Using DDR RAM and SG-DMA for low latency, high-speed data transfer.

• Familiarity with high-speed communication systems viz. USB 3, PCIe, Gbe, 10 Gbe, 100

Gbe etc.

• Linux device driver development.

Skills

• VHDL/Verilog, C/C++, familiar with Xilinx development tools.

• Design knowledge of PCIe, LVDS, SPI, AXI, USB etc. interfaces.

• Ability to design using primitives instead of inferred design from RTL.

• Embedded linux device drivers, petalinux, exposure to yocto project.

• Exposure to various compression algorithms.

Desired Qualification/Experience

• Talent and zeal to work with new challenging system designs.

• Thorough understanding of digital systems.

• Hands-on experience on the RTL design, preferably with a repository of previous

projects

Responsibilities

• Provide leadership in building and growing a Custom layout team from the ground up to support the global DRAM layout requirement;
• Provide leadership in developing Analog and custom layouts to meet schedules and milestones;
• Provide leadership in training the team’s technical skills and cultural healthiness.
• Effectively communicating with engineering teams across multiple countries to ensure the success of the layout project.
• Organize, prioritize, and manage logistics on tasks and resource allocations for multiple projects.
• Manage the performance and development of team members.
• Managing hiring and retention.
• As a critical member of the core DRAM leadership team in India, contributed to the overall success

Qualification/Requirements

• 5 + year experience in analog/custom layout in advanced CMOS process.
• Minimum 3+ years people management experience.
• Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
• Must have strong skills in layout and floor planning skills and manual routing.
• Strong ability to build, and continuously develop a premier analog/mixed-signal layout team
• Experienced in managing multiple Custom IC layout projects
• Highly motivated with passion, detail-oriented, systematic, and methodical approach in IC layout design.
• The ability to work and communicate effectively in a team and to be able to multi-task effectively in a fast-paced working environment.
• Excellent verbal and written communication skills required.
• Independent with strong analytical skills, creative thinking and self-motivation.
• Capable of working in a cross-functional, multi-site team environment in multiple time zones.
• Previous work experience in DRAM/NAND layout design is desirable however not mandatory.

Company Overview:

Replicant Systems is a dynamic startup focused on developing capabilities in hardware design solutions. We are dedicated to creating innovative products that push the boundaries of technology and enhance user experiences for clients in consumer electronics, power and aerospace & defence industries. 

Replicant Systems is founded by experienced entrepreneurs-turned-angel investors who operate their own family office for investments in Hyderabad, called Sunn91 Ventures.

Position Summary:

We are seeking a passionate and motivated Hardware Design Intern to join our team. This internship offers a unique opportunity to see the inner workings of a startup from the ground-up and gain hands-on experience in hardware design and business development.

Location: Hyderabad, on-site

Key Responsibilities:

- Contribute to market research, product ideation, prototyping, and testing

- Participate in brainstorming sessions and contribute innovative ideas to enhance product designs.

- Attend client meetings and gain invaluable insight interacting with CXO suite executives and upper management

- Assist in the design and development of hardware components and systems.

- Assist in the creation and review of schematics, PCB layouts, and technical documentation

- Support in the selection and evaluation of components and materials for hardware projects

Qualifications:

- Currently pursuing a degree in electronics and communications engineering (ECE), mechanical engineering or related field

- Strong understanding of basic electronics principles and circuit design fundamentals

- Proficiency in CAD tools such as AutoCad, Altium Designer, Eagle, or KiCad is preferred

- Familiarity with microcontroller programming and embedded systems is a plus

- Excellent problem-solving skills and attention to detail.

- Ability to work effectively in a team environment and adapt to changing project requirements.

- Excellent communication skills and ability to articulate ideas clearly.

Benefits:

- Gain valuable hands-on experience in hardware design within a startup environment

- Work closely with the founders who are dedicated to your professional growth

- Opportunity to contribute to real-world projects and see your ideas come to life

Duration:

This is a 3-month internship position with the potential for extension based on performance and mutual agreement.

alog Circuit Design::

• The candidate should have B.Tech or M.Tech in Electronics/Electrical/VLSI Design Engineering
• The candidate should have relevant work experience of 7-16 years in Analog and SERDES IO IP design e.g. GPIOs, Thermal Sensor, PLL, ADC/DAC/ Voltage regulators/LDOs, AIB, HBMIO, DDR, HDMI/DP IO, MIPI IO etc.

Job Title: Project Associate - Mixed Signal Design Profile
Industry: Wireless communication, 5G
Organization: 5G TestBed-IIT Hyderabad- Hyderabad

Job Description
Work Profile:
· Work on development of custom Analog circuit boards for applications related to RF, interfaces etc.
· Implement new features and bug fixes
· Verify analog/mixed-signal integrated circuits
· Develop test cases to verify new features and bug fixes
· Review and update the user manuals for software tools.
· Supporting digital modelling of analog circuits for mixed-signal verification
· Creating design specifications and circuit schematics
· Work both independently and in a team environment, with the opportunity to provide technical leadership to other members of the engineering team
· Create and/or modify specification documents detailing system design and enhancements to meet marketing requirements
· Collaborate with others in the creation of technical reports, whitepapers, and user documentation

Requisites:
· EE/EEE/ECE graduate, undergraduate degree from reputed Tier 1 or Tier 2 colleges .
· Strong knowledge of analog integrated circuit design fundamentals
· Proven experience taking designs from concept to production
· Experience in analog/mixed-signal IC design & verification
· Understanding of BJT, CMOS and Op-Amp technologies.
· Good understanding of analog/mixed-signal design flows (Cadence, Synopsys)
· Transistor and system level simulation skills
· Discrete time and continuous time signal processing skills
· Strong lab and silicon validation skills
· Verilog based digital design and test bench development, is a plus
· Strong communication skills, both written and verbal
About us:
For more details please visit: http://5g.iith.ac.in/
IIT Hyderabad in collaboration with top Indian institutes including IITM, CEWiT, IITD, IITK, IISC and SAMEER is building the largest 5G testbed of the country, with the support of Department of Telecommunications (DoT) Govt. of India. This project will create a 5G prototype and testing platform that will be developed under the guidance of IIT-H faculty.
The project will deliver an end-to-end 5G testbed comprising 5G BS and UE nodes that support enhanced mobile broadband (eMBB), Ultra low latency communication (URLLC), and massive MTC including NB IoT services. The operating frequently includes both sub 6 GHz and mmwave frequencies. The system will exceed IMT 2020 5G performance requirements including Low Mobility Large Cell (i.e.., LMLC) targets introduced by India at ITU.
The 'Indigenous 5G Testbed' project is a long-term effort with a team of 100+ researchers/engineers based out of IIT-H campus.